Publications:
Filed Patents:
Zs.
M. Kovacs, Alphanumeric Character Picture Recognition Device, Japan Patent No. JP7282202, pub. date:
27.10.1995 Zs.
Kovacs Vajna, Method and Device for Fingerprint Discrimination, Japan Patent No. JP9326028, pub. date: 16.12.1997 Zs.
M. Kovacs-Vajna, Metodo di Identificazione di Impronte Digitali Utilizzando una
Memoria Flash Analogica, Italian Patent
No. 0001293656, Filing date: 29.07.1997, Issued:
08.03.1999 Zs.
Kovacs Vajna, Method and Device for Identifying Fingerprints, U.S.A. Patent No. US6,236,741, filing
date: 19.02.1997, Issued: 22.05.2001 N. Manaresi, R. Rambaldi, M. Tartagni, Zs. Kovacs Vajna, Low-Cost Semiconductor User Input Device, U.S.A. Patent No. US6,256,022, filing
date: 6.11.1998, Issued: 03.07.2001 R. Rambaldi, M. Tartagni, Zs. Kovacs Vajna, N. Manaresi, Touchpad Computer Input
System and Method, U.S.A. Patent No.
US6,292,173, filing date: 11.09.1998, Issued:
18.09.2001 Zs.
Kovacs Vajna, Method and Device for Identifying Fingerprints Using an Analog
Flash Memory, U.S.A. Patent No.
US6,330,347, filing date: 28.07.1998, Issued:
11.12.2001 Zs.
M. Kovacs, Apparatus for Recognizing Alphanumeric Characters, U.S.A. Patent No. US6,363,171, filing
date: 13.01.1995, Issued: 26.03.2002
Zs.
M. Kovacs, Alphanumeric Characters Images Recognizing System, European Patent No. EP0663644, Bulletin
95/29, 19.07.1995, Issued: 18.09.2002 Zs.
Kovacs Vajna, Method and Device for Identifying Fingerprints, U.S.A. Patent No. US6,480,617, filing
date: 04.04.2001, Issued: 12.11.2002 Zs.
Kovacs Vajna, Method and Device for Identifying Fingerprints, European Patent No. EP0791891, Bulletin
1997/35, 27.08.1997, Issued:
22.01.2003 Zs.
Kovacs, Alphanumeric Characters Images Recognizing System, German Patent No. DE69431393, pub. date: 23.01.2003 Zs.
Kovacs-Vajna, Method and device for identifying fingerprints, German Patent No. DE69625891, pub. date:
13.11.2003 M.
Carmina, L. Colalongo, Zs. M. Kovacs-Vajna, Hybrid Inductive-Capacitive Charge
Pump with Improved Diode Driving Capability, U.S.A. Patent No. US7,034,601, filing date: 28.04.2003, pub. date:
07.10.2004, Issued: 25.04.2006 Richelli,
A Savio, Zs. M. Kovacs-Vajna, Integrated Transformer Based Step-Up Converter, U.S.A. Patent No. US7,196,915, filing
date: 13.01.2003, pub. date: 15.07.2004, Issued:
27.03.2007 L.
Mensi, A. Richelli, L. Colalongo, Zs. M. Kovacs-Vajna, Charge Pump Circuit with
Dynamic Biasing of Pass Transistors, U.S.A.
Patent No. US7,248,096, filing date: 22.11.2004 , pub. date: 25.5.2006, Issued: 24.07.2007 L.
Mensi, A. Richelli, L. Colalongo, Zs. M. Kovacs-Vajna, Charge Pump Circuit with
Reuse of Accumulated Electrical Charge, U.S.A.
Patent No. US7,317,347, filing date: 28.10.2005, pub. date: 25.5.2006, Issued: 8.01.2008 F. Mondinelli, M. Borgatti, Zs. Kovacs, Routing Procedure and System, Corresponding
Network, such as a Network on Chip (NOC), and Computer Program Product
therefor, U.S.A. Patent No.
US7,466,701, filing date: 12.11.2004, pub. date: 18.5.2006, Issued: 16.12.2008 Cacciatori,
G. Cavagnini, Zs. M. Kovacs-Vajna, Radar Apparatus, and Garment and Garment
Assembly Comprising such Apparatus, Patent
(PCT) No. WO 2011080688, filing date: 27.12.2010, pub. date: 07.07.2011 Cacciatori,
G. Cavagnini, Zs. M. Kovacs-Vajna, Radar Apparatus, and Garment and Garment
Assembly Comprising such Apparatus, EU Patent
EP 2519833, pub. date: 7/11/2012 Cacciatori,
G. Cavagnini, Zs. M. Kovacs-Vajna, Dispositivo Radar 3D, Italian Patent No. 0001397141, filing date: 28.12.2009, pub. date:
29.6.2011, Issued: 4/1/2013 Zs.
Kovacs, D. Lena, M. Pasotti, G. Pisoni, F. Torricelli , Single Dispositivo di
Memoria FTP Programmabile e Cancellabile a Livello di Cella, Italian Patent No. 0001397229, filing date: 30.12.2009, pub.
date: 1.7.2011, Issued: 4/1/2013 Cacciatori,
G. Cavagnini, Zs. M. Kovacs-Vajna, Dispositivo Radar Perfezionato, Italian Patent No. 0001397142, filing
date: 28.12.2009, pub. date: 29.6.2011, Issued:
4/1/2013 Cacciatori,
G. Cavagnini, Zs. M. Kovacs-Vajna, Generatore di Impulsi, Italian Patent No. 0001398122, filing date: 19.2.2010, pub. date:
20.8.2011, Issued: 7/2/2013 M.
Pasotti, D. Lena, G. Pisoni, F. Torricelli , Zs. M. Kovacs-Vajna, FTP Memory
Device Programmable and Erasable at Cell Level, U.S.A. Patent No. US8,493,787, filing date: 21.12.2010, pub. date:
30.6.2011, Issued: 23/07/2013 F. Torricelli, L. Colalongo, A. Richelli,
Zs. M. Kovacs Vajna, NVM (nonvolatile memory) device, Chinese Patent Application
No. CN203366749, filing date: 25.6.2013, pub. date: 25.12.2013 F. Torricelli, L. Colalongo, A. Richelli,
Zs. M. Kovacs Vajna, Dispositivo di
Memoria Non Volatile con Celle di Memoria a Singolo Strato di Polisilicio,
Patent No. IT TO2012A000559, filing
date: 25.6.2012, pub. date: 26.12.2013 F.
Torricelli, L. Colalongo, A. Richelli, Zs. M. Kovacs Vajna, Non Volatile Memory
Device with Single-Polysilicion-Layer Memory Cells, Chinese Patent Application
No. CN103515393, filing date: 25.6.2013, pub. date: 15.1.2014 L. Milani, F. Torricelli, A, Richelli, L.
Colalongo, Zs. M. Kovacs Vajna, Memoria Non Volatile Integrata con Celle Di
Memoria a Singolo Strato di Polisilicio Cancellabile Tramite Iniezione di
Elettroni Caldi Indotti da Corrente Elettrica da Banda a Banda e Programmabile
Tramite Tunneling di Flower-Nordheim, Patent
No. MI2014A000154, filing date: 4/2/2014 L. Milani, F. Torricelli, A, Richelli, L.
Colalongo, Zs. M. Kovacs-Vajna, Memoria Non Volatile Integrata con Celle di
Memoria a Singolo Strato di Polisilicio Programmabile Tramite Iniezione di
Elettroni Caldi Indotti da Corrente Elettrica da Banda a Banda e Cancellabile
Tramite Tunneling di Flower-Nordheim, Patent
No. MI2014A000155, filing date: 04/02/2014 L. Milani, F. Torricelli, A, Richelli, L.
Colalongo, Zs. M. Kovacs-Vajna, Memoria Non Volatile Integrata con Celle di
Memoria a Singolo Strato di Polisilicio Programmabile Tramite Iniezione di
Portatori di Carica Elettrica Caldi e Cancellabile Tramite Tunneling di
Fowler-Nordheim, Patent No.
MI2014A000156, filing date: 4/2/2014 F.
Torricelli, L. Colalongo, A. Richelli, Zs. M. Kovacs Vajna, Non Volatile Memory
Device with Single-Polysilicion-Layer Memory Cells, U.S.A. Patent No. US8,873,291, filing date: 25.6.2013,
pub. date: 26.12.2013, Issued:
28/10/2014 L.
Milani, F. Torricelli, A. Richelli, L. Colalongo, Zs. M. Kovacs-Vajna, Embedded
Non-Volatile Memory With Single Polysilicon Layer Memory Cells Programmable Through
Channel Hot Electrons And Erasable Through Fowler-Nordheim Tunneling, U.S.A. Patent No. US9,368,209, filing date 26.01.2015, pub. date: 6.8.2015, Issued 14.06.2016 L.
Milani, F. Torricelli, A. Richelli, L. Colalongo, Zs. M. Kovacs-Vajna, Embedded
Non-Volatile Memory With Single Polysilicon Layer Memory Cells Programmable
Through Band-To-Band Tunneling-Induced Hot Electron And Erasable Through
Fowler-Nordheim Tunneling, U.S.A. Patent No. US9,361,982, Filed 26.01.2015, pub. date: 6.8.2015, Issued 7.06.2016 L.
Milani, F. Torricelli, A. Richelli, L. Colalongo, Zs. M. Kovacs-Vajna, Embedded
Non-Volatile Memory With Single Polysilicon Layer Memory Cells Erasable Through
Band To Band Tunneling Induced Hot Electron And Programmable Through
Fowler-Nordheim Tunneling, US Patent App. No. US2015221661, Filed 26.01.2015,
pub. date: 6.8.2015
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